With the incredible foundation built by our team from Altera and the power of Intel Inside®, we’ll be able to energize the FPGA industry while maintaining the same support levels Altera customers have come to expect. We’re here to help you achieve more success with responsive customer support, improved FPGA and software product execution and innovative product advancements.
We’ll maintain the direct, channel sales and field application engineering teams, while also forming the Customer Experience Group (CEG) to offer expanded support resources online and off. Plus, we’ve unified our partner programs into a new Design Solutions Network (DSN) to accelerate time to market by reducing FPGA design complexities.
Intel is committed to delivering FPGA and SoC FPGA product innovations that include ARM®, supporting future roadmaps and maintaining the long-lasting product lifecycles that customers value from Altera. We’re adding engineering resources to develop new tool flows and IP frameworks that will enable FPGA adoption among a broader base of customers.
Intel’s excellence in product execution and leading manufacturing and packaging capabilities will only improve the experience for FPGA customers. We’re focused on accelerating product rollouts and increasing the quality and adherence to schedule – from engineering silicon to the production of FPGAs.
Today, Intel is already sampling the first MCP that combines a Xeon processor and an Arria 10 FPGA and our Stratix 10 FPGAs are arguably the most ambitious revolution in FPGA design ever taken with up to 10 TFLOPS DSP processing.
Quartus® Prime software puts the full potential of Intel FPGAs at the fingertips of RTL designers. Quartus Prime software contains highly scalable algorithms, a hierarchical database infrastructure, and a unified compiler, which enables hardware designers to accelerate design schedules and increase FPGA performance.
Multiple design entry methods enable developers to harness the power of FPGAs to accelerate data-intensive applications like machine learning. High-level design takes algorithm experts directly from OpenCL™ programs, Simulink models, or signal-processing flow charts to an FPGA design.
FPGA-optimized intellectual property (IP) cores include a unique combination of soft and hard IP, along with reference designs. On top of that, FPGA development kits provide the flexibility to test multiple types of platforms using a single board.
The SoC Embedded Design Suite (SoC EDS) provides embedded developers the necessary tools to work more productively, improve software quality, and ultimately get to market faster when targeting ARM-based SoC FPGAs.